DocumentCode
3566241
Title
Optimized design of a scalable FPGA based inverter by implementing an application-specific instruction-set processor
Author
Bartsch, Alexander ; Klitzke, Karsten ; Senicar, Florian ; Soter, Stefan
Author_Institution
Inst. of Electr. Machines & Drives, Univ. of Wuppertal, Wuppertal, Germany
fYear
2014
Firstpage
1672
Lastpage
1678
Abstract
This paper presents an improvement of a field programmable gate array (FPGA) based scalable inverter drive to control electrical machines. In order to enhance the average utilization of the resources (logic cells and dedicated hardware) of the FPGA, an application-specific instruction-set processor (ASIP) is designed and implemented on the FPGA. To promote better organization of the source code, it is possible to write instructions in a MATLAB based syntax, which are translated into the instruction set for the ASIP.
Keywords
field programmable gate arrays; instruction sets; integrated circuit design; invertors; ASIP; FPGA; MATLAB based syntax; application-specific instruction-set processor; design optimization; electrical machines; field programmable gate array; logic cells; scalable inverter drive; source code; Current control; Field programmable gate arrays; Hardware; Inverters; Pulse width modulation; Registers; Silicon; Enhanced Bandwidth Current Controller; Field Programmable Gate Array (FPGA); Very High Speed Integrated Circuit Hardware Description Language (VHDL);
fLanguage
English
Publisher
ieee
Conference_Titel
Industrial Electronics Society, IECON 2014 - 40th Annual Conference of the IEEE
Type
conf
DOI
10.1109/IECON.2014.7048727
Filename
7048727
Link To Document