Author_Institution :
McPherson Reliability Consulting, 2805 Shelton Way, Piano, Tx 75093
Abstract :
Due to practical test-time constraints for accelerated testing, one is encouraged to perform accelerated testing as rapidly as possible. However, for accelerated testing — how fast is too fast? The purpose of accelerated testing is to accelerate the normal device/material degradation process, without changing the normal degradation physics. This means that the time-to-failure kinetics (activation energy and stress dependence) should not change as the temperature and/or stress-level is elevated. The temperature should not be so great that higher activation-energy degradation mechanisms are introduced during the accelerated test but which would be missing (frozen out) under normal use conditions. As for the magnitude of the accelerating stress (electrical, mechanical, chemical), the stress level should not be so great that the stress dependence changes and/or the activation energy changes as the stress level is increased. During this presentation, we will discuss several important semiconductor device failure mechanisms (electromigration, stress migration, time-dependent dielectric breakdown, bias temperature instability, hot-carrier injection) and discuss the acceptable accelerated testing limits for the accelerated testing of such mechanisms. If the limits on the accelerated testing are too restrictive and must be exceeded, then the conventional time-to-failure models must be modified so as to account for changes in kinetics that can occur. A methodology for time-to-failure model modification, under extreme acceleration conditions, will be presented. It may be possible to use extreme acceleration conditions, provided that certain cautions are used when extrapolating the time-to-failure results from device/material stress-conditions to normal device/material use-conditions.