Clock Distribution Design In VLSI Circuits - an Overview

Author

Friedman, Eby G.

Author_Institution

University of Rochester

fYear

1993

Firstpage

1475

Lastpage

1478

Keywords

Circuit testing; Clocks; Counting circuits; Delay; Latches; Logic; System testing; Timing; USA Councils; Very large scale integration;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 1993., ISCAS '93, 1993 IEEE International Symposium on

Print_ISBN

0-7803-1281-3

Type

Filename

692936

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