Table of contents

The following topics are dealt with: radiation-hardened techniques; CMOS Flash ADC; CMOS subharmonic downconverter; LNTA front-end; injection-locked receiver; constant jitter tracking bandwidth; quadrature clock generation; demodulation; RF signal aggregating four noncontiguous frequency carriers; secure random number generator; reconfigurable sensor-ADC; 4CKES-TAD; digital CMOS; CMOS digital-to-time converter; microradio receiver; radiation pattern measurement technology; third-harmonic-peaking class-Ef power amplifier; inductorless wideband balun-LNA; spin torque oscillator-based field sensing; add-multiply unit; time step control method; transient simulation; DAE system; low noise CMOS image sensor; two-step single-slop ADC; column self-calibration technique; low power fast Ethernet line driver; zero-crossing digital phase-locked loop architecture; hyperbolic nonlinearity; high Doppler environments; MTCMOS low-power optimization technique; pipelined RISC CPU circuit; current-mode instrumentation amplifier; differential difference current conveyor; fast settling ADPLL; temperature compensation PLL controller; Doherty-amplifiers; WLAN applications; monolithic quenching-and-reset circuit- single-photon avalance diodes; fractional delay; Tx leakage compensation; FDD transceivers; CMOS noise cancelling balun LNA; tunable bandpass; digital delta-sigma modulator; startup circuit; low voltage bandgap reference; multi-scheme PSK; QAM modulator; vector scaling; extended event-driven modeling; sigma delta fractional-N PLL; cost-driven statistical analysis; analog circuits; high gain amplifiers; flexible self-aligned a-IGZO thin-film-transistor technology; maximum power-point extraction; small switched-inductor piezoelectric harvesters; all-digital complementary PWM-GRO; network-on-chip platforms; noise robust speech recognition selectivity; noise adapted HMM set; interference noise; incremental sigma delta DAC; high resolution SAR ADC; current mode SAR ADC; CMOS class-AB t- nable voltage-feedback current operational amplifier; three-stage fully-differential amplifier; ultrawideband antenna; dual-band dielectric resonator; harmonic rejection system; integrated active inductors; motion estimation; HEVC encoder; RF intrachip communications; superregenerative QPSK transceiver; eye tracking system; SOPC; entropy source; chaotic dynamics; RNG attacks; CMOS rectifier; multiband ambient RF energy harvesting; CMOS current mode fast folding amplifier; wideband MEMS switched delay lines; low cost earthquake detection system; damage mitigation system; sensor fusion; microbump assignment; RDL routing; 3D IC; low-power silicon nerve membrane; LSB-first SAR ADC; linearity calibration; stochastic ADC; frequency compensation topology; four-stage OTA; and reconfigurable all-band GNSS RF CMOS receiver.