Title :
A MapReduce framework implementation for Network-on-Chip platforms
Author :
Gyftakis, Konstantinos ; Anagnostopoulos, Iraklis ; Soudris, Dimitrios ; Reisis, Dionysios
Author_Institution :
Sch. of Electr. & Comput. Eng., Nat. Tech. Univ. of Athens, Athens, Greece
Abstract :
All facets of society are generating increasing amounts of data confirming the term big data for modern applications. The next generation of embedded systems will be dominated by such smart applications offering a wide range of communication services. Driven also by hardware changes and the adoption of the many-core architectural template, a better resource management scheme is required. MapReduce is a programming model capable of processing large data sets with a parallel distributed algorithm using a large number of processing nodes. In this paper, we present a MapReduce framework for an embedded many-core Network-on-Chip platform with distributed shared memory characteristics. The proposed framework, which supports bare-metal systems, provides a scalable solution for data processing in a many-core system, while fully utilizing the platform´s characteristics and achieving application speedup.
Keywords :
Big Data; distributed shared memory systems; embedded systems; network-on-chip; parallel algorithms; MapReduce framework implementation; application speedup; bare-metal systems; big data; communication services; data processing; data sets; distributed shared memory characteristics; embedded systems; hardware changes; many-core architectural template; network-on-chip platforms; parallel distributed algorithm; programming model; resource management scheme; smart applications; Benchmark testing; Hardware; Histograms; Memory management; Network-on-chip; Synchronization;
Conference_Titel :
Electronics, Circuits and Systems (ICECS), 2014 21st IEEE International Conference on
DOI :
10.1109/ICECS.2014.7049936
