Title :
TCG-S: orthogonal coupling of P*-admissible representations for general floorplans
Author :
Lin, Jai-Ming ; Chang, Yao-Wen
Author_Institution :
Dept. of Comput. & Inf. Sci., Nat. Chiao Tung Univ., Hsinchu, Taiwan
fDate :
6/24/1905 12:00:00 AM
Abstract :
Extends the concept of the P-admissible floorplan representation to that of the P*-admissible one. A P*-admissible representation can model the most general floorplans. Each of the currently existing P*-admissible representations, SP, BSG, and TCG, has its strengths as well as weaknesses. We show the equivalence of the two most promising P*-admissible representations, TCG and SP, and integrate TCG with a packing sequence (part of SP) into a new representation, called TCG-S. TCG-S combines the advantages of SP and TCG and at the same time eliminates their disadvantages. With the property of SP, faster packing and perturbation schemes are possible. Inherited nice properties from TCG, the geometric relations among modules are transparent to TCG-S (implying faster convergence to a desired solution), placement with position constraints becomes much easier, and incremental update for cost evaluation can be realized. These nice properties make TCG-S a superior representation which exhibits an elegant solution structure to facilitate the search for a desired floorplan/placement
Keywords :
VLSI; circuit layout CAD; integrated circuit layout; modules; network topology; P*-admissible representations; TCG-S; VLSI; cost evaluation; floorplans; geometric relations; incremental update; orthogonal coupling; packing; perturbation schemes; position constraints; Algorithm design and analysis; Circuit stability; Constraint optimization; Costs; Design automation; Design engineering; Information science; Modems; Permission; Very large scale integration;
Conference_Titel :
Design Automation Conference, 2002. Proceedings. 39th
Print_ISBN :
1-58113-461-4
DOI :
10.1109/DAC.2002.1012739