3569121

A functional-level testability evaluation using a new M-testability approach

Jamoussi, M. ; Kaminska, Bozena

Ecole Polytechnique Montreal

1993

1611

1614

Circuit testing; Costs; High level synthesis; Integrated circuit testing; Large scale integration; Logic arrays; Logic circuits; Logic design; Logic testing; Process design;

English

ieee

Circuits and Systems, 1993., ISCAS '93, 1993 IEEE International Symposium on

0-7803-1281-3

conf

692972