Title :
LSI design for MPEG-4 coding system
Author :
Chang, Yung-Chi ; Chao, Wei-Min ; Chen, Liang-Gee
Author_Institution :
Dept. of Electr. Eng., Nat. Taiwan Univ., Taipei, Taiwan
Abstract :
This paper presents an LSI design for MPEG-4 video coding. We adopt platform-based architecture with an embedded RISC core and efficient memory organization. A fast motion estimator architecture supporting predictive diamond search and spiral full search with halfway termination is implemented to make good compromise between compression performance and design cost. Several key modules are integrated into an efficient platform in hardware/software co-design fashion. With high degree of optimization in both algorithm and architecture levels, a cost-efficient video encoder LSI is implemented. It consumes 256.8mW at 40MHz and achieves real-time encoding of 30 CIF (352×288) frames per second.
Keywords :
data compression; hardware-software codesign; integrated circuit design; large scale integration; motion estimation; reduced instruction set computing; video coding; 256.8 mW; 40 MHz; LSI design; MPEG-4 video coding system; compression performance; embedded RISC core; halfway termination; hardware/software co-design; memory organization; motion estimator architecture; platform-based architecture; predictive diamond search; spiral full search; video encoder; Computer architecture; Costs; Hardware; Large scale integration; MPEG 4 Standard; Motion estimation; Reduced instruction set computing; Spirals; Video coding; Video compression;
Conference_Titel :
Circuits and Systems, 2004. MWSCAS '04. The 2004 47th Midwest Symposium on
Print_ISBN :
0-7803-8346-X
DOI :
10.1109/MWSCAS.2004.1354192
