Title :
How To Increase the Effectiveness of Yield Diagnostics-Is DFM the Answer to This?
Author_Institution :
Cadence Design Syst. Inc., San Jose, CA
Abstract :
The goal of this panel is to discuss some of the following important items: (i) Are conventional yield diagnostics systems good enough at smaller geometries to isolate the defective location on the chip with good accuracy? (ii) Can DFM based hotspots be overlaid with the yield diagnostics callout based X-Y location and accuracy can be achieved for physical failure analysis? (iii) Can yield diagnostics systems provide a critical link back into the design process for improving design for manufacturability (DFM)?
Keywords :
design for manufacture; nanotechnology; advanced nanometer process technology; design for manufacturability; parametric variations; products; systematic marginalities; yield diagnostics; yield learning technique; Circuit faults; Circuit testing; Circuit topology; Design for manufacture; Failure analysis; Geometry; Manufacturing processes; Nanoscale devices; Process design; Semiconductor device modeling;
Conference_Titel :
Asian Test Symposium, 2008. ATS '08. 17th
Print_ISBN :
978-0-7695-3396-4
DOI :
10.1109/ATS.2008.95
