Title :
Modeling of current lag in GaAs IC´s
Author :
Curtice, W.R. ; Bennett, J.R. ; Suda, D. ; Syrett, B.A.
Author_Institution :
W.R. Curtice Consulting, Princeton Junction, NJ, USA
Abstract :
Leakage currents, thermal effects and deep-level traps cause significant current lag effects in GaAs MESFETs. A conventional, MESFET large-signal, equivalent-circuit model has been modified to simulate these effects and used to improve the design of GaAs digital control and RF switching circuits. Both gate lag and drain lag are simulated as well as over-shoot or under-shoot behavior.
Keywords :
gallium arsenide; GaAs; GaAs ICs; GaAs MESFETs; GaAs RF switching circuits; GaAs digital circuits; current lag modelling; deep-level traps; drain lag simulation; equivalent circuit model; gate lag simulation; large-signal model; leakage currents; over-shoot behavior; thermal effects; under-shoot behavior; Circuit simulation; Circuit testing; Digital control; FETs; Gallium arsenide; Integrated circuit modeling; Leakage current; MESFETs; Telecommunications; Voltage;
Conference_Titel :
Microwave Symposium Digest, 1998 IEEE MTT-S International
Print_ISBN :
0-7803-4471-5
DOI :
10.1109/MWSYM.1998.705065
