• DocumentCode
    3570308
  • Title

    8-bit partial sums of 16 luminance values for fast block motion estimation

  • Author

    Duanmu, C.J. ; Ahmad, M.O. ; Swamy, AndM N S

  • Author_Institution
    Dept. of Electr. & Comput. Eng., Concordia Univ., Montreal, Que., Canada
  • Volume
    1
  • fYear
    2003
  • Abstract
    Fast block motion estimation algorithms are needed for real-time implementations of video coding standards due to the high computational complexity of the full-search algorithm for block motion estimation. In this paper, an algorithm using 8-bit partial sums of 16 luminance values for a fast block motion estimation is proposed. The technique of using the partial sums is employed to reduce the computational complexity of not only the full-search algorithm but also some of the fast block motion estimation algorithms while maintaining their accuracy. Furthermore, it is shown that the byte-type data-parallelism on an SIMD architecture can be utilized to access and process these partial sums concurrently to accelerate the process of motion estimation. Simulation results are presented to demonstrate that the use of the partial sums can accelerate the execution of the full-search, three-step search, and four-step search algorithms on an SIMD architecture significantly.
  • Keywords
    motion estimation; video coding; 16 luminance values; 8-bit partial sums; SIMD architecture; fast block motion estimation; full-search algorithm; video coding standards; Acceleration; Communication standards; Computational complexity; Computer architecture; MPEG 4 Standard; Motion estimation; Signal processing algorithms; Video coding; Video sequences; Video signal processing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Multimedia and Expo, 2003. ICME '03. Proceedings. 2003 International Conference on
  • Print_ISBN
    0-7803-7965-9
  • Type

    conf

  • DOI
    10.1109/ICME.2003.1221011
  • Filename
    1221011