Title :
Getting Closer to True CMOS-Circuits in a 4 M-DRAM
Author :
Pribyl, W. ; B?¤hring, M. ; Sommer, D. ; Smith, S.
Author_Institution :
SIEMENS AG - COMPONENTS GROUP, Otto Hahn Ring 6, D-8000 M?ƒ??nchen 83
Abstract :
NMOS-type circuits in different areas of CMOS-DRAMs are discussed and new concepts using true CMOS circuitry are presented. The second part of the paper describes a 4 Megabit DRAM, which utilizes some of the new concepts. It was fabricated in a submicron, triple poly single metal CMOS technology with a trench capacitor and a Fully Overlapping BItline Contact (FOBIC). RAS access times of 70 ns are achieved with a power consumption of 350 mW (5mW standby).
Keywords :
CMOS logic circuits; CMOS technology; Capacitors; Circuit testing; Degradation; MOS devices; Random access memory; Stress; Switches; Voltage;
Conference_Titel :
Solid-state Circuits Conference, 1987. ESSCIRC '87. 13th European
