• DocumentCode
    3572044
  • Title

    Unique defects and analyses with copper damascene process for multilevel metallization

  • Author

    Song, Z.G. ; Loh, S.K. ; Gunawardana, M. ; Oh, C.K. ; Redkar, S.

  • Author_Institution
    Failure Anal. Group, Chartered Semicond. Manuf. Ltd., Singapore, Singapore
  • fYear
    2003
  • Firstpage
    12
  • Lastpage
    15
  • Abstract
    In this paper, we present some defects encountered and the involved failure analysis methods for these defects during copper metallization development.
  • Keywords
    copper; failure analysis; integrated circuit metallisation; voids (solid); Cu; copper damascene; defects; failure analysis; multilevel metallization; Aluminum; Copper; Delay; Dielectric substrates; Electric resistance; Electromigration; Etching; Metallization; Silicon; Thermal conductivity;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Physical and Failure Analysis of Integrated Circuits, 2003. IPFA 2003. Proceedings of the 10th International Symposium on the
  • Print_ISBN
    0-7803-7722-2
  • Type

    conf

  • DOI
    10.1109/IPFA.2003.1222712
  • Filename
    1222712
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3572044