DocumentCode
3572077
Title
Circuit Technique and Technology of Sub-Nanosecond LSI
Author
Wilhelm, W. ; Berbalk, B. ; Unger, B. ; Graul, J. ; Kaiser, H.
Author_Institution
SIEMENS AG, D Dv WS TE SS 143, Hofmannstr. 51 8000 Munich 70, Germany FRG
fYear
1977
Firstpage
117
Lastpage
118
Abstract
Various power-saving circuit techniques, associated with modern bipolar technology, will be discussed for application in subnanosecond LSI. As a result of this investigation, a masterslice LSI with up to 650 gate functions is presented.
Keywords
Delay effects; Integrated circuit technology; Large scale integration; Logic arrays; Logic circuits; Parasitic capacitance; Signal to noise ratio; Switches; Switching circuits; Tellurium;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid State Circuits Conference, 1977. ESSCIRC '77. 3rd European
Print_ISBN
380071132X
Type
conf
Filename
5435044
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