Title :
Novel Bipolar Transistor Isolation Structure Using Combined Selective Epitaxial Growth and Planarization Technique
Author :
Burghartz, Joachim N. ; Wamock, J. ; Cressler, John D. ; Stanis, C.L. ; McIntosh, R.C. ; Sun, J.Y.-C. ; Comfort, J.H. ; Stork, J.M.C. ; Jenkins, K.A. ; Crabbe, E.F. ; Lee, W. ; Gilbert, M.
Author_Institution :
IBM Research Division, Thomas J. Watson Research Center, Yorktown Heights. New York, 10598 (914) 945-3246
Abstract :
A novel bipolar isolation structure with capability of significantly reducing collector-base capacitance and base resistance is presented. A silicon-on-insulator (SOI) region surrounding the collector opening is used to minimize the collector window width, and to increase the thickness of the extrinsic base contact layer for a given device topography. This partial-SOI isolation structure can be combined with any type of emitter-base self-alined bipolar transistor structure.
Keywords :
Bipolar transistor circuits; Bipolar transistors; Capacitance; Epitaxial growth; Fabrication; Germanium silicon alloys; Isolation technology; Planarization; Silicon germanium; Silicon on insulator technology;
Conference_Titel :
Solid State Device Research Conference, 1992. ESSDERC '92. 22nd European
