DocumentCode
3573515
Title
Soft Breakdown of Ultra-Thin Gate Oxide Layers
Author
Depas, M. ; Heyns, M.M. ; Mertens, P.W.
Author_Institution
IMEC, Kapeldreef 75, B-3001 Leuven, Belgium
fYear
1995
Firstpage
235
Lastpage
238
Abstract
The dielectric breakdown of ultra-thin 3 to 4 nm SiO2 layers used as a gate dielectric in poly-Si gate capacitors is investigated with tunnel current stressing. A soft breakdown phenomenon is demonstrated for these ultra-thin gate oxide layers that corresponds with an anomalous increase of the stress induced leakage current and the occurrence of fluctuations in the current. The occurrence of soft breakdown in these ultra-thin gate oxide layers however is difficult to detect during a standard high-field time dependent dielectric breakdown (TDDB) test.
Keywords
Breakdown voltage; CMOS technology; Current measurement; Degradation; Dielectric breakdown; Electric breakdown; Leakage current; MOS capacitors; Stress; Testing;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid State Device Research Conference, 1995. ESSDERC '95. Proceedings of the 25th European
Print_ISBN
286332182X
Type
conf
Filename
5435955
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