Comparative evaluation of various FFT processor architectures

In this paper the performance of various FFT architectures like pipelined radix 2^k FFT architectures, FFT architectures based on folding transformation and pipelined architectures for real valued signals are compared based on hardware utilization, utilization of adder & subtracter and combinational delay. The evaluation results show that the performance of radix2^k FFT architecture is better in terms of hardware utilization and combinational delay.