Characterizing Energy Consumption of Real-Time and Media Benchmarks on Hybrid SPM-Caches

In this paper, we comparatively evaluate the energy consumption of real-time and media benchmarks on three different hybrid on-chip memory architectures. Our evaluation indicates that while pure SPMs can lead to less on-chip memory energy consumption than pure caches of the same size, the pure caches can reduce total energy consumption than pure SPMs by improving the performance. The hybrid SPM-caches can further reduce the total energy consumption for both real-time and media benchmarks. In particular, we find using the hybrid SPM-caches for both instructions and data can maximally reduce the total energy dissipation.