YAML: a tool for hardware design visualization and capture

Design visualization is an important part of the system design process. In practice, systems are often visualized using a combination of structural and functional entities. We describe an approach that helps to capture the structural aspects of a design at a high level of abstraction and enables the system designer to enter designs “schematically” using predefined structural and functional entities conforming to UML notation. The corresponding tool, YAML (Yet Another UML front end) provides support for modeling objects and a range of object relationships that are crucial to real-life embedded system designs. A YAML design entry can then be automatically translated into synthesizable C++ code for simulation and hardware synthesis