A low sidelobe network for time delayed subarrays

The elements of large arrays are often grouped into subarrays to decrease the array feed complexity or reduce the number of controls. Wideband subarrayed systems use phase shifters at each element and analog time delay units or digital receivers at the subarray level. A cost saving results from the reduction of the number of time delay devices. Until now there have been no appropriate networks for inserting time delay at the subarray ports of large constrained subarrays without causing high sidelobes. This paper describes one such network that, at the outset, provided far lower sidelobes than the usual contiguous subarrays, but retained several high lobes near the main beam. This paper shows the reduction of nearly all sidelobes to levels determined by tolerance errors. Several examples are presented that synthesize sidelobes at -40 dB.