Title :
CBRAM corner analysis for robust design solutions
Author :
Longnos, F. ; Reyboz, M. ; Jovanovic, N. ; Levisse, A. ; Benoist, T. ; Suraci, G. ; Thomas, O. ; Vianello, E. ; Molas, G. ; De Salvo, B. ; Perniola, L.
Author_Institution :
Altis Semicond., Corbeil-Essonnes, France
Abstract :
In this paper, a comprehensive investigation of programming conditions in an oxide-based CBRAM device is presented. 1T-1R devices (both isolated and in a 8×8 matrix) are electrically characterized in a range of logic compatible programming conditions. Starting from the electrical results, programming conditions optimizing the memory window (ROFF/RON>25 in the worst case) and the resistance variability are identified. A corner approach is presented to fully calibrate a CBRAM compact model. The model has been implemented into an electrical simulator to assess performances of NVFF and memory circuit.
Keywords :
integrated circuit design; logic programming; random-access storage; 1T-1R devices; CBRAM compact model; NVFF; conductive bridge random access memories; corner analysis; electrical simulator; logic compatible programming conditions; memory circuit; memory window; oxide-based device; resistance variability; robust design solutions; Anodes; Arrays; Bit error rate; Integrated circuit modeling; Metals; Programming; Resistance; CBRAM; compact modeling; corner; oxide;
Conference_Titel :
Non-Volatile Memory Technology Symposium (NVMTS), 2014 14th Annual
Print_ISBN :
978-1-4799-4203-9
DOI :
10.1109/NVMTS.2014.7060850
