Title :
State of the art ML sensing schemes for low-power CAM in nano-scale CMOS technologies
Author :
Yeo, K.S. ; Do, A.T.
Author_Institution :
IC Design Centre of Excellence, Nanyang Technol. Univ., Singapore, Singapore
Abstract :
Content Addressable Memories (CAM) are used extensively in network routers for extremely fast search operation. In the latest Internet Protocol revision (IPv6), each entry has 128 bits (4× longer than 32-bit of IPv4) to provide enough address space for future usage. However, the wider word length of IPv6 standard leads to a substantial increase in sensing delay and power consumption of CAM. This short paper reviews recently published ML sensing schemes, focusing on low-power, high-speed designs implemented in nano-scale CMOS technology.
Keywords :
CMOS memory circuits; content-addressable storage; low-power electronics; nanoelectronics; network routing; IPv6 standard; Internet Protocol revision; ML sensing schemes; content addressable memory; low-power CAM; nanoscale CMOS technology; network routers; power consumption; storage capacity 128 bit; word length; Registers; formatting; insert; style; styling;
Conference_Titel :
Electron Devices and Solid-State Circuits (EDSSC), 2014 IEEE International Conference on
DOI :
10.1109/EDSSC.2014.7061075
