Title :
An analytical solution to the grain boundary barrier height in undoped polysilicon thin-film transistors
Author :
Zhenning Gong ; Mingxiang Wang
Author_Institution :
Dept. of Microelectron., Soochow Univ., Suzhou, China
Abstract :
Based on U-shaped distribution of density of states (DOS) and discrete grain analysis for grain boundary (GB) traps, a physical-based explicit analytical solution to the GB potential barrier height (ΨB) is developed for undoped polycrystalline silicon thin-film transistors (TFTs). The explicit solution is derived by using the Lambert W function, without additional approximations introduced. The validity and accuracy of the solution is demonstrated by comparing the model with both numerical calculations and experimental ΨB data of polycrystalline Si TFTs.
Keywords :
elemental semiconductors; grain boundaries; silicon; thin film transistors; DOS; GB potential barrier height; GB traps; Lambert W function; U-shaped distribution; density-of-states; discrete grain analysis; grain boundary barrier height; grain boundary traps; numerical calculation; physical-based explicit analytical solution; undoped polycrystalline silicon TFT; undoped polysilicon thin-film transistors; Accuracy; Logic gates; Silicon; Thin film transistors; Lambert W function; grain boundary potential barrier; poly-Si TFTs; undoped channel;
Conference_Titel :
Electron Devices and Solid-State Circuits (EDSSC), 2014 IEEE International Conference on
DOI :
10.1109/EDSSC.2014.7061113