Failure analysis of Gate-all-around Nanowire Field Effect Transistor under TLP test

Author

Guoyan Zhang ; Aihua Dong ; Nie Liu ; Rui Tian ; Xuejiao Yang ; Zhiwei Liu ; Kohui Lee ; Horng-Chih Lin ; Liou, Juin J. ; Wang Yuxin

Author_Institution

Sch. of Microelectron. & Solid-State Electron., Univ. of Electron. Sci. & Technol. of China, Chengdu, China

fYear

2014

Firstpage

1

Lastpage

2

Abstract

Electrostatic discharge (ESD) characters of Nanowire Field Effect Transistors have been tested and analyzed in detail in this paper. TLP (transmission line pulsing technique) and semiconductor characterization system have been used for experiments. The failure currents and leakage currents of Nanowire Field Effect Transistor are characterized. Also, physical insights and failure model are provided to analyze the failure mechanism.

Keywords

electrostatic discharge; failure analysis; field effect transistors; nanowires; semiconductor device reliability; ESD characters; TLP test; electrostatic discharge characters; failure analysis; failure currents; failure mechanism; failure model; gate-all-around nanowire field effect transistor; leakage currents; semiconductor characterization system; transmission line pulsing technique; Dielectrics; Educational institutions; Electrostatic discharges; Failure analysis; Field effect transistors; Logic gates; Nanoscale devices; Electrostatic discharge (ESD); Failure analysis; Nanowire FET; TLP;

fLanguage

English

Publisher

ieee

Conference_Titel

Electron Devices and Solid-State Circuits (EDSSC), 2014 IEEE International Conference on

Type

conf

DOI

10.1109/EDSSC.2014.7061114

Filename

7061114