Title :
Technology migration study of digital CMOS temperature sensors
Author :
Jinn-Shyan Wang ; Zong-Wu He ; Jen-Hsiang Lee ; Shang-Yi Lee
Author_Institution :
Dept. of EE & SoC, Nat. Chung-Cheng Univ., Chiayi, Taiwan
Abstract :
Based on a truly all-digital 90-nm CMOS temperature sensor (TS), evaluation results of 40-/28-nm CMOS TSs designed by technology migration methodology are described in this paper. Stacked inverters and a new 1-point calibration method can be used to reduce the sensing errors by more than 60% and 80% for 40- and 28-nm TSs, respectively.
Keywords :
CMOS digital integrated circuits; temperature sensors; 1-point calibration method; digital CMOS temperature sensor; size 28 nm; size 40 nm; size 90 nm; stacked inverter; technology migration methodology; CMOS integrated circuits; CMOS technology; Calibration; Delays; all digital; technology migration; temperature sensor;
Conference_Titel :
Electron Devices and Solid-State Circuits (EDSSC), 2014 IEEE International Conference on
DOI :
10.1109/EDSSC.2014.7061192
