Title :
Performance analysis of Tunnel Field Effect Transistor using charge plasma concept
Author :
Agrawal, Ishu ; Kondekar, P.N.
Author_Institution :
Dept. of Electron. & Commun. Eng., PDPMIIITDM, Jabalpur, India
Abstract :
In this paper, we have analyzed the impact of gate dielectric, device width, metal electrodes on Tunnel Field Effect Transistor (T-FET). A numerical TCAD device simulator 3-D ATLAS version 2.10.18.R shows that reducing the width can reduce the effective threshold voltage and applied voltages. Transistor with a high ION /IOFF ratio of 1010 sub- threshold swing of 57 mV/decade for the channel length of 50 nm with Hafnium oxide as gate dielectric material. The performance analysis of Tunnel field effect transistor is done by taking doping less T-FET and taking tantalum as the drain electrode, gold as the source electrode and varying dielectric material, width of the device, applied voltages and metal contacts. The simulation results indicate the suitability of the proposed novel structure for replacing the conventional CMOS device.
Keywords :
field effect transistors; gold; hafnium compounds; tantalum; tunnel transistors; 3-D ATLAS version 2.10.18.R; Au; HfO; Ta; charge plasma concept; device width; dielectric material; doping less TFET; drain electrode; gate dielectric; metal electrodes; numerical TCAD device simulator; source electrode; tunnel field effect transistor; Dielectric materials; Dielectrics; Doping; Electrodes; Field effect transistors; Logic gates; Threshold voltage; Band to band tunneling; Gated p+-i-n+ diode; charge plasma; double gate (DG); subthreshold swing (SS); tunnel field effect transistor (T-FET);
Conference_Titel :
Electron Devices and Solid-State Circuits (EDSSC), 2014 IEEE International Conference on
DOI :
10.1109/EDSSC.2014.7061239
