Design of cascode topology based CMOS power amplifier for wireless applications

An Radio Frequency (RF) Power Amplifier (PA) plays a key role in front end of RF Transmitter. It´s role is to convert low power RF Signal into high Power signal so that it can drive the antenna of the transmitter. The PA exhibits certain desirable characteristics such as enormous output Power, reduced heat dissipation, nominal input and output return loss and eminent gain. It is necessary to cut down Power consumption of PA, since PA depletes majority of Power at the transmitter. A two stage cascode topology based 0.18μm Complementary Metal Oxide Semiconductor (CMOS) PA with driver and power stages has been designed using Agilent Advanced Design System (ADS 2009) simulation tool. Here PA needs dc power supply of 1.8V and designed to operate at 2.4 GHz. Current mirror biasing is used at both the stages. The circuit uses source degeneration for input matching and tank circuit for output matching. Interstage matching is provided by a capacitor.