DocumentCode :
3580697
Title :
Multi-user MIMO wireless system -from theory to chip design
Author :
Ochi, Hiroshi
Author_Institution :
Dept. of Comput. Sci. & Electron., Kyushu Inst. of Technol., Fukuoka, Japan
fYear :
2014
Firstpage :
1
Lastpage :
10
Abstract :
We have presented our hardware design of a 1.3Gbps 802.11ac MU-MIMO system its synthesis result on FPGA. Some blocks such as the viterbi decoder, and MU-MIMO related blocks are still work in progress either to reduce complexity or meet timing.
Keywords :
MIMO communication; Viterbi decoding; field programmable gate arrays; integrated circuit design; multi-access systems; wireless LAN; FPGA; IEEE 802.11ac MU-MIMO system; Viterbi decoder; chip design; hardware design; multiuser MIMO wireless system;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Information Technology, Computer and Electrical Engineering (ICITACEE), 2014 1st International Conference on
Print_ISBN :
978-1-4799-6431-4
Type :
conf
DOI :
10.1109/ICITACEE.2014.7065703
Filename :
7065703
Link To Document :
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