DocumentCode
3581937
Title
Design and evaluation of realizable and compact low-impedance transmission lines for two top-metal-layer semiconductor processes
Author
Pahl, P. ; Diebold, S. ; Krause, S. ; Gulan, H. ; Pauli, M. ; Massler, H. ; Leuther, A. ; Kallfass, I. ; Zwick, T.
Author_Institution
Karlsruhe Institute of Technology (KIT), Institut für Hochfrequenztechnik und Elektronik (IHE), Germany
fYear
2014
Firstpage
52
Lastpage
54
Abstract
This paper compares three different narrow 12.5Ω lines regarding their insertion loss. All three lines are realizable on a two top-metal-layer semiconductor process. It turns out that an artificial LC/ telegrapher line, composed of high and low impedance line elements, has the lowest loss of all three presented lines. The investigation, which is based on EM simulations is verified by S-Parameter measurements of all three lines up to 325 GHz. For a length of 315 µm the LC line shows an insertion loss of 2.5 dB@200 GHz.
Keywords
Dielectric losses; Impedance; Insertion loss; Loss measurement; Silicon compounds; Transmission line measurements; MMIC; Millimeter wave amplifiers; power amplifier; transmission lines;
fLanguage
English
Publisher
ieee
Conference_Titel
Microwave Conference (APMC), 2014 Asia-Pacific
Type
conf
Filename
7067946
Link To Document