DocumentCode
358259
Title
High-speed dynamic logic styles for scaled-down CMOS and MTCMOS technologies
Author
Allam, Mohamed W. ; Anis, Mohab H. ; Elmasry, Mohamed I.
Author_Institution
VLSI Res. Group, Waterloo Univ., Ont., Canada
fYear
2000
fDate
2000
Firstpage
155
Lastpage
160
Abstract
A new high-speed domino circuit, called HS-Domino is developed. HS-Domino resolves the trade-off between performance and noise margins in conventional CD-Domino logic while dissipating low dynamic power with minimal area overhead. A dual-threshold (MTCMOS) implementation of HS-Domino and DDCVS logic is also devised. This implementation achieves low leakage values during standby, while maintaining high performance and low dynamic power during the active mode.
Keywords
CMOS logic circuits; high-speed integrated circuits; leakage currents; low-power electronics; DDCVS logic; MTCMOS; active mode; dual-threshold implementation; dynamic power; high-speed domino circuit; high-speed dynamic logic styles; leakage values; low dynamic power; minimal area overhead; noise margins; scaled-down CMOS; CMOS logic circuits; CMOS technology; Circuit noise; Dynamic voltage scaling; Leakage current; Logic circuits; Logic devices; Power dissipation; Switches; Threshold voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Low Power Electronics and Design, 2000. ISLPED '00. Proceedings of the 2000 International Symposium on
Print_ISBN
1-58113-190-9
Type
conf
DOI
10.1109/LPE.2000.155270
Filename
876774
Link To Document