Implementation of a DSP-based frequency non-selective fading simulator

A single DSP chip (TMS320 E15) has been used as an essential subsystem in the implementation of a real-time Rayleigh plus log-normal fading simulator. The simulator algorithm utilises two independent quasisinusoidal processes based on the central limit theorem. It can directly generate two random signals which are the in-phase and quadrature components of the Rayleigh and log-normal fading. Both the first and second order statistics of the envelope distribution are satisfied by this mathematical-modelling-oriented algorithm. The simulator provides user-selectable radio channel parameters with dual outputs providing Rayleigh plus log-normal fading and having a 52 dB dynamic range over a 500 MHz to 2 GHz usable RF bandwidth. The software-controlled hardware algorithm-based fading simulator has been constructed and extensively tested. The experimental results very closely conform to theoretical statistical predictions