• DocumentCode
    358533
  • Title

    Low power video object motion-tracking architecture for very low bit rate online video applications

  • Author

    Badawy, Wael ; Bayoumi, Magdy

  • Author_Institution
    Dept. of Electr. & Comput. Eng., Calgary Univ., Alta., Canada
  • fYear
    2000
  • fDate
    2000
  • Firstpage
    533
  • Lastpage
    536
  • Abstract
    This paper presents a low power VLSI architecture for video object motion-tracking that can be used in very low bit rate online video applications. Power has been reduced at both algorithmic and arithmetic levels. The video object motion-tracking architecture consists of two main parts, a mesh-based motion estimation unit and a mesh-based motion compensation unit. The mesh-based motion estimation unit implements parallel block matching motion estimation units to optimize the latency. The mesh-based motion compensation unit uses parallel multiplication-free affine core. The architecture has been prototyped and its performance measures have been evaluated. This processor can be used in online object-based video applications
  • Keywords
    motion compensation; motion estimation; video signal processing; low power VLSI; mesh-based; motion compensation; motion estimation; online video applications; video object motion-tracking; video object motion-tracking architecture; Application software; Bit rate; Circuits; Computer architecture; Costs; Delay; Mobile communication; Motion compensation; Motion estimation; Pipeline processing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Computer Design, 2000. Proceedings. 2000 International Conference on
  • Conference_Location
    Austin, TX
  • ISSN
    1063-6404
  • Print_ISBN
    0-7695-0801-4
  • Type

    conf

  • DOI
    10.1109/ICCD.2000.878333
  • Filename
    878333