DocumentCode
3585408
Title
3D interconnect simulation applied to CMP thickness variations
Author
Ling-Wu Yang ; Tahone Yang ; Kuang-Chao Chen ; Chih-Yuan Lu ; Shi-Hao Huang ; Lin, Kevin ; Shan-Chung Lee ; Donghua Liu ; Rong Lv ; Chingyun Hsiang ; Chenmin Hu
Author_Institution
Technol. Dev. Center, Macronix Int. Co. Ltd., Hsinchu, Taiwan
fYear
2014
Firstpage
1
Lastpage
3
Abstract
Thickness variations of ILD CMP induced yield loss at wafer edge is simulated by 3D Sentaurus Interconnect, in order to achieve more authentic condition, we adopt the image contour extraction technique to stream the genuine contact contour gds together with STI, POLY, ML database. The results demonstrates that when the thickness is over 7k at wafer edge, there is no electric current found, and it has etching stop phenomenon. After optimizing the CMP recipe according the simulation results, the yield of wafer edge get great improvement.
Keywords
chemical mechanical polishing; image processing; production engineering computing; semiconductor technology; 3D Sentaurus interconnect simulation; CMP thickness variations; ILD CMP; ML database; POLY database; STI database; etching; image contour extraction technique; image stream; wafer edge; Databases; Etching; Image edge detection; Semiconductor device modeling; Solid modeling; Streaming media; Three-dimensional displays; CMP; Image Contour Extraction; Sentaurus Interconnect; Simulation; Thickness Variation;
fLanguage
English
Publisher
ieee
Conference_Titel
e-Manufacturing and Design Collaboration Symposium (eMDC), 2014
Type
conf
Filename
7081700
Link To Document