DocumentCode :
3585516
Title :
New Fault Tolerance Control for Cell-Based Evolve Hardware Architecture
Author :
Chanin Wongyai ; Nilagupta, Pradondet
Author_Institution :
Dept. of Comput. Eng., Kasetsart Univ., Bangkok, Thailand
Volume :
2
fYear :
2014
Firstpage :
408
Lastpage :
411
Abstract :
This paper presents a new fault tolerance control unit model in a cell-based architecture. This model is 2 layers and 2 dimensions array architecture that each layer can be independently repaired. In the approach considered a cell to be control layer and functional layer that control unit in the control layer can be used to detect and repair faults in other control units in their layer. Therefore, this process is transparent to the functional layer that still working during repair phase. Each layer also uses to support repair and detect faults between layers. This paper shows how the model can be used to repair cover a control units fault and a functional unit fault. The reliability analysis shows the improving fault-tolerance of this model.
Keywords :
computer architecture; fault tolerant control; cell-based evolve hardware architecture; control layer; fault detection; fault repair; fault tolerance control; functional layer; reliability analysis; repair phase; Computer architecture; Fault tolerance; Fault tolerant systems; Hardware; Maintenance engineering; Microprocessors; evolve hardware; fault-tolerance; reliability; self-repair;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Computational Intelligence and Design (ISCID), 2014 Seventh International Symposium on
Print_ISBN :
978-1-4799-7004-9
Type :
conf
DOI :
10.1109/ISCID.2014.259
Filename :
7082018
Link To Document :
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