• DocumentCode
    3585581
  • Title

    Time sharing of Runtime Coarse-Grain Reconfigurable Architectures processing elements in multi-process systems

  • Author

    Schafer, Benjamin Carrion

  • Author_Institution
    Dept. of Electron. & Inf. Eng., Hong Kong Polytech. Univ., Hong Kong, China
  • fYear
    2014
  • Firstpage
    76
  • Lastpage
    82
  • Abstract
    This paper presents a method to time share the Processing Elements (PEs) of Runtime Coarse Grain Reconfigurable Architectures (CGRA) among multiple processes being executed concurrently onto the same CGRA. Runtime CGRA architectures time-multiplex the data path, creating a set of contexts for each state. These contexts configure the PEs and the routing resources of the CGRA and are typically loaded every clock cycle. The target architecture in this work is a commercial CGRA IP which is embedded as an IP into complex SoCs. Our proposed method analyzes the PE utilization in each context for multi-process systems running concurrently onto the same CGRA and time shares unused PEs assigned to one process with the other processes running in parallel. Our method reduces the total PE usage and hence the size of the CGRA IP and therefore the cost of the SoC. Results show that our method is extremely efficient and can reduce the PE utilization by up to 20% and on average by 14% and is only 2% worse than the optimal solution, while being much faster.
  • Keywords
    multiprocessing systems; reconfigurable architectures; system-on-chip; CGRA; PE; SoC; multiprocess system; processing element; runtime coarse-grain reconfigurable architecture; system-on-a-chip; time sharing method; Context; IP networks; Optimization; Resource management; Runtime; Space exploration; System-on-chip;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Field-Programmable Technology (FPT), 2014 International Conference on
  • Print_ISBN
    978-1-4799-6244-0
  • Type

    conf

  • DOI
    10.1109/FPT.2014.7082757
  • Filename
    7082757