• DocumentCode
    3585604
  • Title

    A flexible interface architecture for reconfigurable coprocessors in embedded multicore systems using PCIe Single-root I/O virtualization

  • Author

    Sander, Oliver ; Baehr, Steffen ; Luebbers, Enno ; Sandmann, Timo ; Viet Vu Duy ; Becker, Juergen

  • Author_Institution
    Karlsruhe Inst. of Technol. (KIT), Karlsruhe, Germany
  • fYear
    2014
  • Firstpage
    223
  • Lastpage
    226
  • Abstract
    Especially in complex system-of-systems scenarios, where multiple high-performance or real-time processing functions need to co-exist and interact, reconfigurable devices together with virtualization techniques show considerable promise to increase efficiency, ease integration and maintain functional and non-functional properties of the individual functions. In this paper, we propose a flexible interface architecture with low overhead for coupling reconfigurable coprocessors to high-performance general-purpose processors, allowing customized yet efficient construction of heterogeneous processing systems. Our implementation is based on PCI Express (PCIe) and optimized for virtualized systems, taking advantage of the SR-IOV capabilities in modern PCIe implementations. We describe the interface architecture and its fundamental technologies, detail the services provided to individual coprocessors and accelerator modules, and quantify key corner performance indicators relevant for virtualized applications.
  • Keywords
    coprocessors; embedded systems; field programmable gate arrays; multiprocessing systems; peripheral interfaces; reconfigurable architectures; virtualisation; PCI Express; PCIe single-root I/O virtualization; SR-IOV capabilities; accelerator module; complex system-of-system scenarios; coprocessor module; efficiency improvement; embedded multicore systems; field programmable gate arrays; flexible interface architecture; functional property maintenance; heterogeneous processing systems; high-performance functions; high-performance general-purpose processors; integration improvement; key-corner performance indicator quantification; nonfunctional property maintenance; overhead; real-time processing functions; reconfigurable coprocessor coupling; reconfigurable coprocessors; reconfigurable devices; Bandwidth; Computer architecture; Coprocessors; Field programmable gate arrays; Hardware; Throughput; Virtualization;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Field-Programmable Technology (FPT), 2014 International Conference on
  • Print_ISBN
    978-1-4799-6244-0
  • Type

    conf

  • DOI
    10.1109/FPT.2014.7082780
  • Filename
    7082780