Performance evaluation of deep sub-micron, fully-depleted silicon-on-insulator (FD-SOI) transistors at low temperatures

Author

Yuan, J. ; Patel, J.U. ; Vandooren, A.

Author_Institution

Jet Propulsion Lab., California Inst. of Technol., Pasadena, CA, USA

Volume

5

fYear

2000

fDate

2000

Firstpage

415

Abstract

The performance of 0.25, 0.3 and 0.35 μm fully-depleted SOI transistors is characterized between 77 and 300 K. The behavior of device parameters such as drain current, mobility, transconductance, threshold voltage, subthreshold slope, and Early voltage is analyzed. The suitability of sub-micron FD-SOI devices is examined for low temperature operation as encountered in deep space exploration missions. The results indicate significant performance improvements with decreasing temperature down to 100 K. A second effect dominates below this temperature, thus decreasing mobility and leading to other parameter degradations below 100 K

Keywords

MOSFET; carrier mobility; semiconductor device measurement; semiconductor technology; silicon-on-insulator; space vehicle electronics; 0.25 mum; 0.3 mum; 0.35 mum; 100 K; 77 to 300 K; Early voltage; below 100 K; deep space exploration missions; deep sub-micron SOI transistors; down to 100 K; drain current; fully-depleted SOI transistors; low temperature operation; mobility; performance improvements; subthreshold slope; threshold voltage; transconductance; Laboratories; Mars; Semiconductor device measurement; Semiconductor films; Silicon on insulator technology; Space exploration; Temperature measurement; Temperature sensors; Threshold voltage; Transconductance;

fLanguage

English

Publisher

ieee

Conference_Titel

Aerospace Conference Proceedings, 2000 IEEE

Conference_Location

Big Sky, MT

ISSN

1095-323X

Print_ISBN

0-7803-5846-5

Type

conf

DOI

10.1109/AERO.2000.878516

Filename

878516