DocumentCode
3586309
Title
Comparative analysis of using planar MOSFET and FinFET as access transistor of STT-RAM Cell in 22-nm technology node
Author
Byungkyu Song ; Taehui Na ; Hanwool Jeong ; Kang, Seung H. ; Jung Pill Kim ; Seong-Ook Jung
Author_Institution
Dept. of Electr. & Electron. Eng., Yonsei Univ., Seoul, South Korea
fYear
2014
Firstpage
112
Lastpage
113
Abstract
As technology node scaling, FinFET becomes the substitution for planar MOSFET due to several merits of FinFET such as superior gate controllability, large on-current, and low variability. For the reasons, using FinFET as access transistor of spin-transfer-torque random access memory (STT-RAM) cell should be analyzed. This paper compares using planar MOSFET and FinFET as access transistor of STT-RAM cell and concludes which device is more proper solution for high write and read yields.
Keywords
MOSFET; random-access storage; FinFET; STT-RAM cell; access transistor; gate controllability; on-current; planar MOSFET; read yield; size 22 nm; spin-transfer-torque random access memory cell; technology node scaling; write yield; Controllability; FinFETs; Integrated circuits; Logic gates; Process control; Resistance; Resource description framework; Access transistor; FinFET; MRAM; Read yield; STT-RAM; Technology node scaling;
fLanguage
English
Publisher
ieee
Conference_Titel
SoC Design Conference (ISOCC), 2014 International
Type
conf
DOI
10.1109/ISOCC.2014.7087593
Filename
7087593
Link To Document