On-chip aging prediction circuit in nanometer digital circuits

In nanometer technology, accurate circuit aging prediction of MOSFET digital circuits caused by aging phenomenon is one of the most critical issues for more reliable adaptive tuning system design. This paper proposes a new on-chip aging sensor circuit to predit and detect a circuit failure caused by BTI and HCI aging effects on digital circuits. The proposed circuit is based on timing warning windows to warn against a guardband violation of sequential circuits, and generates three warning bits right before circuit failures occur.