Title :
Understanding DDR4 in pursuit of In-DRAM ECC
Author :
Sanghyuk Kwon ; Young Hoon Son ; Jung Ho Ahn
Author_Institution :
Dept. of Transdisciplinary Studies, Seoul Nat. Univ., Seoul, South Korea
Abstract :
Continuous DRAM scaling exacerbates problems caused by faulty cells, which lead to lower yields and more frequent errors. In-DRAM ECC is regarded as one of the solutions to overcome these issues. The latest DDR4 SDRAM specification includes new features to further improve reliability, such as an ALERT_n pad, which can be used to report errors detected by a SECDED code in DRAM. This paper identifies the possibilities and challenges of implementing In-DRAM ECC on DDR4 SDRAM devices.
Keywords :
DRAM chips; error correction codes; error detection codes; ALERT_n pad; DDR4 SDRAM device; DDR4 SDRAM specification; DRAM scaling; In-DRAM ECC; SECDED code; Arrays; Capacitors; Data transfer; Error correction codes; SDRAM; DDR4; ECC; In-DRAM ECC; SECDED; overhead characteristcs;
Conference_Titel :
SoC Design Conference (ISOCC), 2014 International
DOI :
10.1109/ISOCC.2014.7087646
