• DocumentCode
    3586385
  • Title

    Comparison of subthreshold logic with adiabatic circuit techniques

  • Author

    Gong, Cihun-Siyong Alex ; Chi-Tong Hung ; Chu, Wei-Lin William ; Chang-Jie Lin ; Yu-Fan Luo ; Chih-Yun Chien ; Yu-Hung Kuo ; Meng-Jung Chang ; Chin-Chih Hsu

  • Author_Institution
    Dept. of Electr. Eng., Chang Gung Univ., Taoyuan, Taiwan
  • fYear
    2014
  • Firstpage
    146
  • Lastpage
    147
  • Abstract
    Among the reviews and discussions demonstrated in the literature, very little attention was paid to which logic style is the most for adiabatic and subthreshold techniques. This study tries to make up such a deficiency, with particular emphasis on two representative circuit structures. All the comparisons were based on 0.18-μm standard CMOS process.
  • Keywords
    CMOS logic circuits; CMOS standard process; adiabatic circuit technique; size 0.18 mum; subthreshold logic circuit; CMOS integrated circuits; CMOS technology; Clocks; Logic gates; Robustness; Transistors; CMOS; adiabatic; energy recovery; subthreshold; ultra-low power; ultra-low voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    SoC Design Conference (ISOCC), 2014 International
  • Type

    conf

  • DOI
    10.1109/ISOCC.2014.7087669
  • Filename
    7087669
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3586385