Through-silicon via placement with shuffled frog leap algorithm

Through-silicon via (TSV) is a promising technology for the three dimensional (3D) IC packaging industry. Well-managed TSV alleviate routing congestion, enhancing performance of 3D ICs. The logic cells stacked through TSV are analogous to the vertices to be traversed exactly once in a graph. However, traditional Hamilton loop method is a NP-hard (non-deterministic polynomial) problem. This paper proposes a new TSV placement method based on the Shuffled Frog Leap Algorithm (SFLA). The Hamilton Loop is a term used to describe a shortest graph theory. The SFLA is used to solve the Hamilton Loop this NP-hard problem. The SFLA simulation results indicate that the proposed-TSV placement could achieve wire distance reduction by 15% reliably. The results can be used to guide the electronic design automation (EDA) layout tools.