Title :
A prototype design for microprocessor based on Verilog HDL
Author :
Hinsu, Nikunj ; Suryavanshi, Digvijaysinh
Author_Institution :
VLSI, U.V. Patel Coll. of Eng. & Technol., Mehsana, India
Abstract :
Nowadays for developing any embedded system the microprocessor is used extensively, but they comes to any developer as an black-box in which signals are provided from one side and corresponding output is extracted out from other side. So if developer knows what is hardware present inside the processor which he/she is currently using, then it would be helpful for making his/her design simple & optimized. In this paper, we have represented the design and simulation result of basic three elementary modules of microprocessor i.e. ALU, RAM and Instruction decoder and finally combined all three modules using Structural modelling. This four bit processor has been designed as a prototype for designing advanced processors.
Keywords :
embedded systems; hardware description languages; integrated circuit design; microprocessor chips; Verilog HDL; embedded system; microprocessor elementary modules; prototype design; structural modelling; Convergence; Decoding; Field programmable gate arrays; Hardware design languages; Microprocessors; Random access memory; Registers; ALU (Arithmetic and Logical Unit); Instruction Decoder; Processor; RAM (Random Access Memory); Verilog HDL (Hardware Description Selection); Xilinx ISE;
Conference_Titel :
Convergence of Technology (I2CT), 2014 International Conference for
Print_ISBN :
978-1-4799-3758-5
DOI :
10.1109/I2CT.2014.7092116
