• DocumentCode
    3587888
  • Title

    Improved non-restoring square root algorithm with dual path calculation

  • Author

    Kihwan Jun ; Swartzlander, Earl E.

  • Author_Institution
    Dept. of Electr. & Comput. Eng., Univ. of Texas at Austin, Austin, TX, USA
  • fYear
    2014
  • Firstpage
    1243
  • Lastpage
    1246
  • Abstract
    This paper focuses on reducing the delay of the non-restoring square root algorithm. Although the non-restoring square root algorithm is faster than the other radix-2 digit recurrent square root algorithms, there are still some possibilities to enhance its performance. To improve its performance, two new approaches are proposed here. For the first proposed approach, a novel method to find a square root bit for every iteration, which hides the total delay of the multiplexer with dual path calculation is presented. Secondly, a new method uses the modified Most Significant Carry (MSC) generator, which determines the sign of each remainder faster than a carry lookahead adder, which reduces the total delay.
  • Keywords
    digital arithmetic; iterative methods; carry lookahead adder; delay reduction; dual-path calculation; improved nonrestoring square root algorithm; iteration; modified MSC generator; modified most significant carry generator; multiplexer; radix-2 digit recurrent square root algorithm; Adders; Algorithm design and analysis; Computers; Delays; Generators; Multiplexing; Standards;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Signals, Systems and Computers, 2014 48th Asilomar Conference on
  • Print_ISBN
    978-1-4799-8295-0
  • Type

    conf

  • DOI
    10.1109/ACSSC.2014.7094658
  • Filename
    7094658