Title :
Principle of bit-synchronization loop
Author :
Ke Sheng ; Anjum, M.R. ; Dida, Mussa A.
Author_Institution :
Sch. of Inf. & Electron., Beijing Inst. of Technol., Beijing, China
Abstract :
This paper describes the construction and operating principles of bit-synchronization loop study based research, including the principles of the timing-error detector (Gardner Algorithm), the number- controlled oscillator and the interpolation filter. This paper is divided into three parts and simulation results have been performed using MATLAB. At last, the results are analyzed with conclusion that the loop performed the best sampled signal sequences.
Keywords :
demodulators; filtering theory; interpolation; signal sampling; Gardner Algorithm; MATLAB; bit synchronization loop principle; digital demodulator; interpolation filter; number controlled oscillator; sampled signal sequences; timing error detector; Global Positioning System; Interpolation; Joints; Mathematical model; Oscillators; Synchronization;
Conference_Titel :
Multi-Topic Conference (INMIC), 2014 IEEE 17th International
Print_ISBN :
978-1-4799-5754-5
DOI :
10.1109/INMIC.2014.7097322
