• DocumentCode
    3588438
  • Title

    Hardware accelerated Wavelet Transform and de-noising for pattern recognition

  • Author

    Javaid, Salman ; Zaidi, Syed Sajjad Haider

  • Author_Institution
    Dept. of Electron. & Power Eng., Nat. Univ. of Sci. & Technol., Islamabad, Pakistan
  • fYear
    2014
  • Firstpage
    514
  • Lastpage
    518
  • Abstract
    Wavelet Transform is a widely used tool in signal processing which helps in localizing a signal in both time and frequency domain. This is in contrast to FFT which can only resolve a signal in frequency domain. Additionally, Wavelet Transform has been widely employed by electrical machines researchers for fault diagnosis and prognosis especially as means to extract features for classification purposes. The problem though with both machine learning algorithms and Wavelet Transform is that they require extensive computational resources which are not available in environs where electrical machines are most often placed. Additionally, these environments are plagued by noise which considerably affects the quality of input signal i.e., current. Other issues related to on-board system is the associated cost of diagnosis hardware. Concretely, the algorithm for Wavelet Analysis of a signal should be capable of producing reasonable results using cost effective hardware which comes with the compromise of lesser resolution, limited memory and low power consumption. In this proposed work, implementation scheme of Wavelet Transform on low cost PSoC3 hardware is presented which tightly integrates the FPGA blocks and DSP processor on the chip with microcontroller core to yield a fast and robust hardware accelerated mechanism to compute Wavelet Transform, Wavelet thresholding for denoising and classification.
  • Keywords
    digital signal processing chips; field programmable gate arrays; microcontrollers; pattern recognition; signal classification; signal denoising; system-on-chip; wavelet transforms; DSP processor; FPGA blocks; PSoC3 hardware; classification; de-noising; hardware accelerated wavelet transform; microcontroller core; pattern recognition; wavelet thresholding; Computer architecture; Hardware; Noise; Noise reduction; Support vector machines; Wavelet transforms;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Multi-Topic Conference (INMIC), 2014 IEEE 17th International
  • Print_ISBN
    978-1-4799-5754-5
  • Type

    conf

  • DOI
    10.1109/INMIC.2014.7097394
  • Filename
    7097394