Data acquisition system for the Belle II experiment

The Belle II experiment, a new generation B-factory experiment at KEK aiming to search for new physics beyond the standard model, is scheduled to start in 2016. The maximum trigger rate is expected to reach as high as 30 kHz with the raw event size of more than 1MB, and the data acquisition is a big challenge. The Belle II DAQ system is a synchronous system based on a pipelined trigger flow control. Data from all sub detectors except for the Pixel Detector (PXD) digitized by the front-end are transferred to unified readout modules (COPPER) via a high speed optical link (Belle2link). The data are then collected by the readout PCs via Ethernet and the event building is performed in multiple steps. The built events are fed into High Level Trigger (HLT) to perform a software trigger. For processing data of PXD, an FPGA-based readout system (ONSEN) is used. ONSEN performs a data reduction by exploiting the feed-back of track information obtained by HLT. In order to test the full functionality of our DAQ design, we developed a down-scaled version of the Belle II DAQ system. The system was first tested with dummy data to check its basic performance and then used in the combined beam test of Silicon Vertex Detector (SVD) and PXD in the DESY test beam performed in January 2014. A slow control and real time data monitoring are also implemented in this test. All components of this complex readout chain successfully cooperated to collect the beam data. We present the BelleII DAQ system and the current status of the development.