A versatile FPGA framework for pixel array detectors

For applications at different X-Ray light sources three pixel array detectors with a common digital readout concept are under development at DESY. All three detectors use an identical digital data acquisition and control board behind sensor and readout-ASIC. A FPGA Framework has been created, which provides generic access to the readout-boards peripherals and which implements fast data transmission with four 10Gbit Ethernet links via UDP to external IT-hardware. This approach simplifies the development of detector- and application specific firmware.