DocumentCode
3588793
Title
A prototype FPGA implementation of a real-time delay-and-sum beamformer
Author
Cuadros, Angela P. ; Nino, Cesar L.
Author_Institution
Pontificia Univ. Javeriana, Colombia
fYear
2014
Firstpage
1
Lastpage
1
Abstract
Summary form only given. This article describes a prototype FPGA implementation, of a delay-and-sum beamformer in the audio frequency range. This prototype is essentially a real-time acoustic camera, which is used to estimate a sound field intensity. Data acquisition is performed by means of a 4-microphone square array and the delay- and-sum beamforming algorithm is implemented on a Xilinx Spartan 3AN FPGA. The computed acoustic intensity images are visualized in a TFT display of a resolution of 320×240 pixels, at 26 frames-per-second.
Keywords
acoustic field; acoustic imaging; array signal processing; cameras; data acquisition; display instrumentation; field programmable gate arrays; image resolution; microphone arrays; thin film transistors; 4-microphone square array; TFT display; Xilinx Spartan 3AN FPGA; acoustic intensity image resolution; audio frequency range; data acquisition; real-time acoustic camera; real-time delay-and-sum beamformer; sound field intensity estimation; Acoustics; Arrays; Cameras; Data acquisition; Field programmable gate arrays; Prototypes; Real-time systems;
fLanguage
English
Publisher
ieee
Conference_Titel
ANDESCON, 2014 IEEE
Print_ISBN
978-1-4799-6685-1
Type
conf
DOI
10.1109/ANDESCON.2014.7098568
Filename
7098568
Link To Document