DocumentCode :
3589891
Title :
The reliability study of 0.13μm CMOS process
Author :
Xiaowen Zhang ; Yunfei En
Author_Institution :
CEPREI, Sci. & Technol. on Reliability Phys. & Applic. of Electron. Component Lab., Guangzhou, China
fYear :
2014
Firstpage :
979
Lastpage :
982
Abstract :
When the Minimum channel length shrink to 0.13μιη, As the device geometry size scaling down while the operation voltage of the device decreased, but the electric field increase. The current density is still high in interconnect line, various failure mechanisms still exist in the process generation of copper interconnect/low k dielectric integrated, the reliability is still a very important problem. By using accelerated test, the reliability of the main failure mechanisms have been evaluated, the results showed that the lifetimes of main failure mechanism can achieve the requirements of more than 10 years lifetime. In the same time, NBTI effect will become the main failure mechanism in ultra deep sub-micron CMOS process when Minimum channel length becomes less than 0.13 μιη.
Keywords :
CMOS integrated circuits; integrated circuit interconnections; integrated circuit reliability; life testing; negative bias temperature instability; CMOS process reliability; NBTI effect; accelerated test; copper interconnect; device geometry size scaling; failure mechanisms; interconnect line current density; low k dielectric; minimum channel length shrink; negative bias temperature instability; size 0.13 mum; Copper; Dielectrics; Failure analysis; Human computer interaction; Logic gates; Reliability; Stress; cmos process; copper/low k dielectric; failure mechanisms; reliability;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Reliability, Maintainability and Safety (ICRMS), 2014 International Conference on
Print_ISBN :
978-1-4799-6631-8
Type :
conf
DOI :
10.1109/ICRMS.2014.7107350
Filename :
7107350
Link To Document :
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